The AD9552 is a fractional-N phase locked loop (PLL) based clock generator designed specifically to replace high frequency crystal oscillators and resonators. The device employs a sigma-delta (Σ-Δ) modulator (SDM) to accommodate fractional frequency synthesis. The user supplies an input reference signal by connecting a single-ended clock signal directly to the REF pin or by connecting a crystal resonator across the XTAL pins. The AD9552 is pin programmable, providing one of 64 standard output frequencies based on one of eight common input frequencies. The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency ratios. The AD9552 relies on an external capacitor to complete the loop filter of the PLL. The output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels, although the AD9552 is implemented in a strictly CMOS process. The AD9552 is specified to operate over the extended industrial temperature range of −40°C to +85°C. APPLICATIONS * Cost effective replacement of high frequency VCXO, OCXO, and SAW resonators * Extremely flexible frequency translation with low jitter for SONET/SDH (including FEC) , 10 Gb Ethernet, Fibre Channel, and DRFI/DOCSIS * High-definition video frequency translation * Wireless infrastructure * Test and measurement (including handheld devices) * Converts a low frequency input reference signal to a high frequency output signal * Input frequencies from 6.6 MHz to 112.5 MHz * Output frequencies up to 900 MHz * Preset pin programmable frequency translation ratios * Arbitrary frequency translation ratios via SPI port * Accepts a crystal resonator and/or an external oscillator as a reference frequency source https://elecena.pl/product/17774436/oscillator-frequency-up-converter 2021-04-17 https://elecena.pl/product/17774436/oscillator-frequency-up-converter 2025-01-20