The MAX1207 is a 3.3V, 12-bit analog-to-digital converter (ADC) featuring a fully differential wideband track-andhold (T/H) input, driving the internal quantizer. The MAX1207 is optimized for low power, small size, and high dynamic performance. This ADC operates from a single 3.0V to 3.6V supply, consuming only 316mW, while delivering a typical signal-to-noise ratio (SNR) performance of 68.5dB at a 32.5MHz input frequency. The T/H-driven input stage accepts single-ended or differential inputs. In addition to low operating power, the MAX1207 features a 0.15mW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX1207 to use its internal precision bandgap reference or accept an externally applied reference. A common-mode reference is provided to simplify design and reduce external component count in differential analog input circuits. The MAX1207 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC's internal duty-cycle equalizer. The MAX1207 features parallel, CMOS-compatible outputs. The digital output format is pin selectable to be either two's complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate power input for the digital outputs accepts a voltage from 1.7V to 3.6V for flexible interfacing with various logic levels. The MAX1207 is available in a 6mm x 6mm x 0.8mm, 40- pin thin QFN package with exposed paddle (EP), and is specified for the extended industrial (-40°C to +85°C) temperature range. Refer to the MAX1209 and MAX1211 (see Pin Compatible Higher/Lower Speed Versions table) for applications that require high dynamic performance for IF input frequencies. Applications * Cellular, LMDS, Point-to-Point Microwave, MMDS, HFC, WLAN * Communication Receivers * Low-Power Data Acquisition * MMDS, HFC, WLAN * Portable Instrumentation * Ultrasound and Medical Imaging * Excellent Dynamic Performance * 68.5dB SNR at fIN = 32.5MHz * 88.7dBc SFDR at fIN = 32.5MHz * 3.3V Low-Power Operation * 316mW (Single-Ended Clock Mode) * 342mW (Differential Clock Mode) * Differential or Single-Ended Clock * Accepts 20% to 80% Clock Duty Cycle * Fully Differential or Single-Ended Analog Input * Adjustable Full-Scale Analog Input Range * Common-Mode Reference * Power-Down Mode * CMOS-Compatible Outputs in Two's Complement or Gray Code * Data-Valid Indicator Simplifies Digital Design * Out-of-Range and Data-Valid Indicators * Miniature, 40-Pin Thin QFN Package with Exposed Paddle * Pin-Compatible, IF Sampling ADC Available (MAX1211ETL) * Evaluation Kit Available (Order MAX1211EVKIT)