<?xml version="1.0" encoding="UTF-8"?>
<!--Generated at Fri, 17 Apr 2026 23:46:44 +0200-->
<rss version="2.0">
 <channel>
  <title>[elecena] Dual, 65Msps, 12-Bit, IF/Baseband ADC - zmiany ceny</title>
  <description>The MAX12527 is a dual 3.3V, 12-bit analog-to-digital
converter (ADC) featuring fully differential wideband
track-and-hold (T/H) inputs, driving internal quantizers.
The MAX12527 is optimized for low power, small size,
and high dynamic performance in intermediate frequency
(IF) and baseband sampling applications. This dual
ADC operates from a single 3.3V supply, consuming
only 620mW while delivering a typical 69.8dB signal-tonoise
ratio (SNR) performance at a 175MHz input frequency.
The T/H input stages accept single-ended or
differential inputs up to 400MHz. In addition to low operating
power, the MAX12527 features a 166µW powerdown
mode to conserve power during idle periods.

A flexible reference structure allows the MAX12527 to
use the internal 2.048V bandgap reference or accept
an externally applied reference and allows the reference
to be shared between the two ADCs. The reference
structure allows the full-scale analog input range
to be adjusted from ±0.35V to ±1.15V. The MAX12527
provides a common-mode reference to simplify design
and reduce external component count in differential
analog input circuits.

The MAX12527 supports either a single-ended or differential
input clock. User-selectable divide-by-two (DIV2)
and divide-by-four (DIV4) modes allow for design flexibility
and help eliminate the negative effects of clock jitter.
Wide variations in the clock duty cycle are compensated
with the ADC's internal duty-cycle equalizer (DCE).

The MAX12527 features two parallel, 12-bit-wide,
CMOS-compatible outputs. The digital output format is
pin-selectable to be either two's complement or Gray
code. A separate power-supply input for the digital outputs
accepts a 1.7V to 3.6V voltage for flexible interfacing
with various logic levels. The MAX12527 is available
in a 10mm x 10mm x 0.8mm, 68-pin thin QFN package
with exposed paddle (EP), and is specified for the
extended (-40°C to +85°C) temperature range.

For a 14-bit, pin-compatible version of this ADC, refer to
the MAX12557 data sheet.

Applications

* Digital Set-Top Boxes

* I/Q Receivers

* IF and Baseband Communication Receivers: Cellular, LMDS, Point-to-Point Microwave, MMDS, HFC, WLAN

* Low-Power Data Acquisition

* Portable Instrumentation

* Ultrasound and Medical Imaging

* Direct IF Sampling Up to 400MHz

* Excellent Dynamic Performance

* 70.4dB/69.8dB SNR at
fIN = 70MHz/175MHz

* 84.4dBc/80.2dBc SFDR at
fIN = 70MHz/175MHz

* 3.3V Low Power Operation

* 647mW (Differential Clock Mode)

* 620mW (Single-Ended Clock Mode)

* Fully Differential or Single-Ended Analog Input

* Adjustable Differential Analog Input Voltage

* 750MHz Input Bandwidth

* Adjustable, Internal or External, Shared Reference

* Differential or Single-Ended Clock

* Accepts 25% to 75% Clock Duty Cycle

* User-Selectable DIV2 and DIV4 Clock Modes

* Power-Down Mode

* CMOS Outputs in Two's Complement or Gray
Code

* Out-of-Range and Data-Valid Indicators

* Small, 68-Pin Thin QFN Package

* 14-Bit Compatible Version Available (MAX12557)

* Evaluation Kit Available (Order MAX12557EVKIT)</description>
  <item>
   <title>Dual, 65Msps, 12-Bit, IF/Baseband ADC - 29.89 USD</title>
   <link>https://elecena.pl/product/22314062/dual-65msps-12-bit-if-baseband-adc</link>
   <pubDate>2022-12-27</pubDate>
  </item>
  <item>
   <title>Dual, 65Msps, 12-Bit, IF/Baseband ADC - 0.00 USD</title>
   <link>https://elecena.pl/product/22314062/dual-65msps-12-bit-if-baseband-adc</link>
   <pubDate>2025-01-21</pubDate>
  </item>
 </channel>
</rss>
