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Multiband, Multimode RF-to-Bits CDMA Femto-Basestation Radio Receiver

Analog Devices

Multiband, Multimode RF-to-Bits CDMA Femto-Basestation Radio Receiver RSS Sample
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MPN:
MAX2557A
Producent:
ANALOG DEVICES
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The MAX2557A is a complete direct-conversion RF-to-bits receiver for cdma2000® 1x/EVDO femto basestations in Band Classes 0 and 1. The device has dedicated receive paths to enable monitoring forward link activities in both bands.

The unique RF-to-bits architecture of the MAX2557A integrates four LNAs with inputs/outputs internally matched to 50Ω, quadrature mixers, baseband anti-aliasing filters, programmable-gain RF and baseband amplifiers, fractional-N RF synthesizer, RF VCO, fractional-N frequency synthesizer for ADC sampling clock, and high-dynamic-range I/Q continuous-time sigma-delta ADCs. The sigma-delta modulators perform I and Q analog-to-digital conversion onto 1-bit digital streams. A programmable LVDS-like interface, with its own frac-N clock generation system, is used for the data transfer to the baseband/DSP, where the final decimation, equalization, and digital channel filtering are performed in compliance with the MAX-PHY digital section definition. Digital IP blocks are available from Maxim. The MAX2557A modes of operation are programmable by a 3-wire serial bus.

The MAX2557A is specified for operation in the extended -40°C to +85°C temperature range and is available in a 7mm x 7mm x 1.4mm fcLGA package with exposed pad (EP).

Applications

* cdma2000 1x/EVDO Femto Basestations

* Complete RF-to-Digital-Bits Radio Receiver Subsystem

* Supports

* cdma2000 1x/EVDO Band Class 0 and 1 Reverse Link

* cdma2000 1x/EVDO Band Class 0 and 1 Forward Link Monitoring

* TS25.104 Compliant

* Compatible with UMTS1900, UMTS850, and CDMA Interference Environments

* High-Dynamic-Range Continuous-Time Sigma-Delta ADCs Allow Simple AGC Implementation with Switched Gain States

* MAX-PHY Digital Rx Interface with Single-Bit I/Q Bitstream, No Analog Signals

* On-Chip Fractional-N Frequency Synthesizers for LO and Sampling Clock Generation

* Dual-Buffered Reference Outputs to Drive Transmit IC and Baseband DSP

* Programmable Rail-to-Rail GPO Pins Controlled by Serial Interface for External Component Control

* Operation Controlled Entirely by 3-Wire Serial Interface, No Analog Control Signals Necessary

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