The MAX9396 consists of a 2:1 multiplexer and a 1:2 demultiplexer with loopback. The multiplexer section (channel B) accepts two differential inputs and generates a single differential output. The demultiplexer section (channel A) accepts a single differential input and generates two parallel differential outputs. The MAX9396 features a loopback mode that connects the input of channel A to the output of channel B and connects the selected input of channel B to the outputs of channel A. The differential inputs of the MAX9396 accept CML/LVPECL levels and can also accept LVDS inputs with common-mode voltages from +0.6V to (VCC - 0.05V). The differential outputs are LVDS compatible and drive 100Ω loads. Three LVCMOS/LVTTL logic inputs control the internal connections between inputs and outputs, one for the multiplexer portion of channel B (BSEL), and the other two for loopback control of channels A and B (LBSELA and LBSELB). Independent enable inputs for each differential output pair provide additional flexibility. Fail-safe circuitry forces the outputs to a differential low condition for undriven inputs or when the commonmode voltage is below +0.6V. Ultra-low 57psP-P (typ) pseudorandom bit sequence (PRBS) jitter ensures reliable communications in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 1.25Gbps operation and less than 87ps (max) skew between channels. The MAX9396 is available in a 32-pin TQFP package and is specified over the -40°C to +85°C extended temperature range. Applications * Central Office Backplane Clock Distribution * DSLAM * Fault-Tolerant Systems * High-Speed Telecom/Datacom Equipment * Protection Switching * Guaranteed 1.25Gbps Operation with 450mV (min) Differential Output Swing * Integrated 100Ω Resistors on Differential Inputs * Simultaneous Loopback Control * 2ps(RMS) (max) Random Jitter * AC Specifications Guaranteed for 150mV Differential Input * Signal Inputs Accept Any Differential Signals with VCM = +0.6V to (VCC - 0.05V) * LVDS Outputs for Clock or High-Speed Data * Low-Level Input Fail-Safe Detection * +3.0V to +3.6V Supply Voltage Range * LVCMOS/LVTTL Logic Inputs