Three ADCs, One DAC, Low Power Codec with Audio DSPs

The ADAU1861 is a codec with three inputs and one output that incorporates two digital-signal processors (DSPs). The path from the analog input to the DSP core to the analog output is optimized for low latency.

APPLICATIONS

* Automotive audio systems

* Digital audio effects processors

* Programmable FastDSP audio processing engine

* Up to 768 kHz sample rate

* Biquad filters, limiters, volume controls, mixing

* Tensilica HiFi 3z DSP core

* Quad MAC per cycle: 24 × 24-bit multiplier and 64-bit accumulator

* Flexible power operation mode: 24.576 MHz, 49.152 MHz, 73.728 MHz, and 98.304 MHz

* 336 kB total memory

* JTAG debug and trace

* Low latency, 24-bit ADCs, and DAC

* 106 dB SNR (signal through ADC with A-weighted filter)

* 110 dB combined SNR (signal through DAC and headphone with A-weighted filter)

* Programmable double precision MAC engine for maximum 24- stage equalizer

* Serial-port sample rates from 8 kHz to 768 kHz

* 5 μs group delay (fS = 768 kHz) analog in to analog out with FastDSP bypass (zero instructions)

* 3 differential or single-ended analog inputs, configurable as microphone or line inputs

* 8 digital microphone inputs

* Analog differential audio output, configurable as either line output or headphone driver