PLA133-97

The PLA133-97 is an advanced fanout buffer designed for automotive high performance, low-power, small form factor applications. The PLA133-97 accepts a reference clock input from DC to 150 MHz and provides nine outputs of the same frequency with ultra-low additive jitter. The device is AEC-Q100 qualified. The PLA133-97 is offered in a small 3 mm x 3 mm wettable flank QFN-16L package.

The PLA133-97 outputs can be disabled to a high impedance (tri-state) by pulling low the OE pin. When the OE pin is high, the outputs are enabled and follow the REF input signal. When the OE pin is left open, a pull-up resistor on the chip will default the OE pin to logic 1 so the outputs are enabled.

CLK8 is a free running output that remains enabled when the OE pin is pulled low.

6-output PLA133-67 https://www.microchip.com/wwwproducts/en/PLA133-67 and 4 output PLA133-47 https://www.microchip.com/wwwproducts/en/PLA133-47 are also available.