The OS81092 is a highly-integrated Intelligent Network Interface Controller (INIC) specifically designed for the 50 Mbps MOST® network (MOST50) with an electrical physical layer optimized for Unshielded Twisted Pair (UTP) copper wire. The integrated electrical physical layer (ePHY) signal conditioning circuitry offers differential I/O that interfaces to a passive ePHY transformer. This enables MOST data transmission via UTP cable. The OS81092 is the cost-optimized version of OS81082. Like all INIC circuits, the OS81092 implements time-critical, resource-intensive and fail-safe relevant parts of the network driver on-chip. The INIC makes a MOST device accessible according to the rules of the MOST Specification, even without participation from the External Host Controller (EHC). The INIC provides a message-based interface for control and packet data. Configuration is encapsulated within a Function Block (FBlock INIC) which allows the EHC to manage INIC in the same way as other functions in the system. Further information is available from Microchip Support.