The SN74LV6T06-EP device contains six independent inverters with open-drain outputs and extended voltage operation to allow for level translation. Each inverter performs the Boolean function Y = A in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.2V, 1.8V, 2.5V, 3.3V, and 5V CMOS levels. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5V tolerant input pins enable down translation (for example, 3.3V to 2.5V output).