The ADC34RF52 is a single core 14-bit, 1.5-GSPS, quad channel analog to digital converter (ADC) that supports RF sampling with input frequencies up to 2.5 GHz. The design maximizes signal-to-noise ratio (SNR) and delivers a noise spectral density of -153 dBFS/Hz. Using additional internal ADCs along with on-chip signal averaging, the noise density improves to -156 dBFS/Hz. Each ADC channel can be connected to a dual-band digital down-converter (DDC) using a 48-bit NCO which supports phase coherent frequency hopping. Using the GPIO pins for NCO frequency control, frequency hopping can be achieved in less than 1 µs. The ADC34RF52 supports the JESD204B serial data interface with subclass 1 deterministic latency using data rates up to 13 Gbps. There are only 2 serdes lanes per ADC channel. The power efficient ADC architecture consumes 0.73 W/ch at 1.5-GSPS and provides power scaling with lower sampling rates.