The 9ZML1256 is a second generation of enhanced performance DB1200ZL derivative. The device features both PLL and Bypass modes for flexibility. The PLL has a low noise PLL that can be used as a PCIe clock jitter cleaner. The device supports PCIe Gen1–7 and more complex architectures like SRIS and SRNS clocking. For information regarding evaluation boards and material, please contact your local sales representative.