S25FS256TDACHC113 is a 256 Mbit FS-T NOR Flash for code and data storage over Quad SPI. It operates from 1.7 V to 2.0 V across 0°C to 70°C (commercial) and supports SDR reads up to 80 MHz, with up to 40 MByte/s interface bandwidth. Built-in ECC corrects 1-bit and detects 2-bit errors, with SFDP plus unique ID, RD/BY# status, and RESET#/CS# signaling reset options for robust boot memory.