CY7C1625KV18-250BZXC is a 144-Mbit QDR II synchronous pipelined SRAM in a 165-ball FBGA. It implements separate read and write ports with two-word burst transfers (16M × 9 organization) and DDR data interfaces. Rated for 250 MHz operation, it supports 1.5-cycle read latency in QDR II mode (DOFF high) or 1-cycle latency in QDR I mode (DOFF low), with echo clocks, ZQ programmable impedance and on-chip PLL.