CY7C1615KV18-300BZXI is a 144-Mbit QDR II synchronous pipelined SRAM (4 M × 36) with separate read and write ports for concurrent transactions. It supports DDR transfers at 666 MHz using a 333 MHz clock and four-word burst operation, with 1.5-cycle read latency when DOFF is high. It operates over the industrial range (TA −40°C to +85°C) from 1.7–1.9 V VDD and 1.4 V to VDD VDDQ in a 165-ball FBGA.