CY7C1615KV18-250BZXC is a 144-Mbit QDR II synchronous pipelined SRAM organized as 4 M × 36 with separate read and write ports for concurrent transactions. It supports 250 MHz clocks with DDR transfers on both ports (data at 500 MHz). Core supply VDD is 1.7 V to 1.9 V and I/O VDDQ is 1.4 V to VDD. The Pb-free 165-ball FBGA (15 × 17 × 1.4 mm) targets high-bandwidth networking and DSP buffering.