CY7C1612KV18-250BZXC is a 144-Mbit QDR II synchronous pipelined SRAM in an 8M × 18 organization. It uses separate read and write ports with DDR interfaces and a two-word burst, eliminating data bus turnarounds and supporting concurrent transactions. The 250 MHz speed grade operates from 1.8 V core (±0.1 V) with 1.4 V to VDDQ I/O supply, and supports 1.5-cycle read latency (DOFF high).