The CY7C1565KV18-550BZXC is a 72-Mbit (2M × 36) QDR II+ synchronous pipelined SRAM with separate read and write ports and a four-word burst architecture (2.5-cycle read latency). It supports a 550 MHz clock with DDR interfaces on both ports for data transfers up to 1100 MHz. It runs from 1.7 V to 1.9 V VDD with 1.4 V to VDD VDDQ and is supplied in a 165-ball (13 × 15 × 1.4 mm) FBGA Pb-free package.