CY7C1565KV18-500BZXI is a 72-Mbit (2M × 36) 1.8 V synchronous pipelined QDR II+ SRAM with separate read and write ports and a four-word burst architecture. It supports 2.5-cycle read latency and DDR transfers on K/K clocks to 500 MHz, with CQ/CQ echo clocks and a QVLD data-valid output. I/O VDDQ ranges from 1.4 V to VDD, in a 165-ball FBGA for -40°C to +85°C industrial operation.