CY7C4141KV13-667FCXC is a 144-Mbit QDR-IV HP SRAM in a 4M × 36 organization, optimized for random transactions with dual independent bidirectional DDR data ports. It supports up to 667 MHz clock (1334 MT/s RTR) with two-word burst, SDR control and DDR address signaling. On-die termination, bus inversion, address parity, and JTAG 1149.1 test access are included. On-chip ECC corrects single-bit errors.