CY7C4121KV13-633FCXI is a 144-Mbit QDR-IV HP SRAM organized as 8M × 18 with dual independent bidirectional DDR data ports and a shared DDR address bus. It supports a 2-word burst, 633 MHz max clock (1266 MT/s RTR), read latency 5 cycles and write latency 3 cycles. It runs from 1.3 V core with HSTL/SSTL or POD I/O, includes on-die termination, optional address parity, and on-chip ECC for single-bit correction.