The CY7C2670KV18-550BZI is a 144-Mbit (4M × 36) DDR II+ synchronous pipelined SRAM with two-word burst architecture and 2.5-cycle read latency. It runs at 550 MHz clock (1100 MHz data transfer) and uses 1.8 V core with 1.4 V to VDD I/O supply (industrial -40°C to +85°C). ODT for D/BWS and K/K, CQ/CQ echo clocks, and QVLD simplify high-speed DDR capture; IEEE 1149.1 JTAG supports test access.