CY7C2665KV18-450BZXI is a 144-Mbit QDR II+ synchronous pipelined SRAM organized as 4M × 36 with separate read and write ports for concurrent transactions. It supports a 450 MHz clock with DDR transfers (900 MT/s) and four-word burst operation with 2.5-cycle read latency (1-cycle in QDR I mode via DOFF). 1.8 V core supply and on-die termination for D/BWS and K/K inputs simplify high-speed board design.