CY7C25632KV18-400BZXI is a 72-Mbit QDR II+ synchronous pipelined SRAM organized as 4M × 18 with separate read and write DDR ports for concurrent transactions. It supports a 400 MHz clock and transfers data at up to 800 MT/s with 2.5-cycle read latency. The device operates from 1.7 V to 1.9 V VDD with VDDQ from 1.4 V to VDD, includes on-die termination, PLL, and JTAG, and is offered in a 165-ball FBGA, -40 to +85°C industrial range.