CY7C1372KV25-167AXC is an 18-Mbit (1M × 18) 2.5 V synchronous pipelined burst SRAM with No Bus Latency (NoBL) architecture. It supports 167 MHz bus operation with fully registered inputs/outputs for zero wait-state back-to-back reads and writes. VDD and VDDQ operate from 2.375 V to 2.625 V. It includes byte-write control, CEN clock suspend, ZZ sleep mode, and IEEE 1149.1 JTAG boundary scan in a 100-pin TQFP Pb-free package.