The CY7C1371KV33-133AXC is an 18-Mbit synchronous flow-through burst SRAM (512K × 36) with NoBL architecture for true back-to-back read/write transfers with no wait states. It supports bus operation up to 133 MHz with 6.5 ns clock-to-data valid, linear or interleaved 4-beat bursts, byte write control, and on-chip ECC. Commercial grade, 3.3 V core with 2.5 V/3.3 V VDDQ I/O, in 100-pin TQFP.