CY7C1370KV33-167AXIT is an 18-Mbit (512K × 36) synchronous pipelined burst SRAM with NoBL architecture, supporting zero-wait-state read/write transitions up to 167 MHz. It uses fully registered inputs/outputs and an on-chip burst counter for up to four-word linear or interleaved bursts. 3.3 V VDD with 3.3 V/2.5 V VDDQ, byte write via BW signals, IEEE 1149.1 JTAG, and ZZ sleep mode are included.