CY7C1512KV18-250BZXC is a 72-Mbit QDR II synchronous pipelined SRAM in a 4M × 18 organization, with separate read and write ports to eliminate bus turnaround. It supports two-word burst transfers with DDR interfaces, operating up to 250 MHz clock. Core VDD is 1.8 V ±0.1 V with VDDQ from 1.4 V to VDD. It includes byte write, ZQ programmable impedance, echo clocks, and an on-chip PLL.