CY7C1480BV33-200AXC is a 72-Mbit pipelined synchronous SRAM organized as 2M × 36 with a 2-bit internal burst counter. It supports 200 MHz bus operation with registered inputs/outputs for 3-1-1-1 burst access, byte writes, and single-cycle chip deselect. The core runs from 3.135 V to 3.6 V (VDD) with 2.5 V or 3.3 V I/O (VDDQ), includes IEEE 1149.1 JTAG, and provides a ZZ sleep mode option.