CY7C1480BV33-167AXI is a 72-Mbit pipelined synchronous SRAM organized as 2M × 36 with registered inputs/outputs for 3-1-1-1 burst operation up to 167 MHz. It uses a 3.3 V core supply with 2.5 V/3.3 V JESD8-5 compatible I/O, supports interleaved or linear bursts via an on-chip 2-bit counter, and provides byte writes (BWE/BWX) plus global write (GW). Asserting ZZ enters sleep mode and preserves data integrity.