CY7C1470V25-200AXC is a 72-Mbit (2M × 36) 2.5 V synchronous pipelined burst SRAM with NoBL architecture, supporting 200 MHz bus operation with zero wait states. It uses registered inputs/outputs, 3 chip enables plus asynchronous OE, and an on-chip burst counter for up to four transfers (linear or interleaved). Byte-write (BWa–BWd) and ZZ sleep mode are supported. Packaged in 100-pin Pb-free TQFP.