CY7C1441KVE33-133AXC is a 36-Mbit synchronous flow-through SRAM organized as 1M × 36 with on-chip ECC. It supports 133 MHz bus operation with 6.5 ns clock-to-output and a 2-bit burst counter for linear or interleaved 2-1-1-1 bursts, initiated by ADSP or ADSC. Core supply is 3.135 V to 3.6 V with 2.5 V or 3.3 V I/O, JESD8-5 compatible, in a 100-pin TQFP Pb-free package (0°C to 70°C).