CY7C1373KV33-100AXC is an 18-Mbit (1M × 18) synchronous flow-through burst SRAM with NoBL architecture and on-chip ECC. It supports 100 MHz operation with registered inputs, byte writes, and linear or interleaved 4-beat bursts. A 3.3 V core with 2.5 V/3.3 V VDDQ I/O, 3-chip-enable bank selection, and ZZ sleep mode (data retained) fit networking, telecom, and cache/buffer designs.