CY7C1440KV33-250BZXI is a 36-Mbit (1M × 36) pipelined synchronous SRAM for secondary cache, supporting bus operation up to 250 MHz with registered inputs/outputs and 3-1-1-1 burst access. It runs from a 3.3 V core with 2.5 V or 3.3 V I/O, delivers 2.5 ns max clock-to-output (tCO), and offers a user-selectable linear or interleaved burst counter plus ZZ sleep mode and IEEE 1149.1 JTAG boundary scan.