The RC313xxA (RC31312A and RC31309A) is a member of Renesas' VersaClock® 8 programmable clock generator/jitter attenuator family. The device is comprised of a programmable fractional-N DPLL for ultra-low phase noise clocking and jitter attenuation, and an Analog PLL (APLL) driving three independent programmable fractional output dividers (FOD) and individual IODs on each of the seven output banks. The devices can simultaneously provide low-phase jitter non-spreading clocks for Ethernet and storage applications and spread-spectrum PCIe Gen7 clocks. Up to 18 configurations reusable across multiple designs may be stored in on-chip One-Time Programmable (OTP) memory or external I2C EEPROM. Redundant input is available for backup and used as a reference clock where needed.