Renesas' SerDes PHY IP, a useful analog transceiver hard macro for various high-speed serial interfaces, is fabricated using TSMC's 28nm HPC+ (High-Performance Compact Plus) process technology. This macro is designed for PCI Express® 2.1 and USB 3.0 SuperSpeed®. *1: There are some restrictions on the use cases of PCI Express 2.1 and USB 3.0 SuperSpeed. Please contact us for detailed information before purchasing the product.