The Renesas PCIe 4.0 Dual-Mode Link Controller IP is compliant with the PCI Express® (PCIe®) 4.0 Base Specification. This IP supports the major functions required for a PCIe link IP in embedded systems. This IP's system interface is based on the AMBA® AXI Protocol Specification v1.0 (ARM IHI 0022B) and the PHY Interface for the PCI Express, Serial Advanced Technology Attachment (SATA), and USB 3.1 Architectures (PIPE) 4.4.1 Specification. This IP has many configurable parameters for each product. The IP is written in Verilog RTL.