This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.