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  <title>[elecena] Low Power, 1.8/2.5/3.3-V Input, 3.3-V CMOS Output, Single Schmitt-Trigger Buffer Gate - zmiany ceny</title>
  <description>The SN74AUP1T50 performs the Boolean function Y = A with designation for logic-level
		translation applications with output referenced to supply VCC.

	 AUP technology is the industrys lowest-power logic technology designed for use in
		extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while
		operating from either a single 3.3-V or 2.5-V VCC supply. This product also
		maintains excellent signal integrity.

	 The wide VCC range of 2.3 V to 3.6 V allows the possibility of
		switching output level to connect to external controllers or processors.

	 Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative
		input transitions) offer improved noise immunity during switching transitions, which is especially
		useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of
		output signals, and allow for slow input signal transition.

	 Ioff is a feature that allows for powered-down conditions
		(VCC = 0 V) and is important in portable and mobile applications. When
		VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the
		inputs and outputs of the device. No damage occurs to the device under these conditions.

	 The SN74AUP1T50 is designed with optimized current-drive capability of 4 mA to reduce
		line reflections, overshoot, and undershoot caused by high-drive outputs.</description>
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