The AD6674 is a 385 MHz bandwidth mixed-signal intermediate frequency (IF) receiver. It consists of two, 14-bit 1.0 GSPS/750 MSPS/500 MSPS analog-to-digital converters (ADC) and various digital signal processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. It has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of sampling wide bandwidth analog signals of up to 2 GHz. The AD6674 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package. The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. Applications * Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A * DOCSIS 3.0 CMTS upstream receive paths * HFC digital reverse path receivers * JESD204B (Subclass 1) coded serial digital outputs * In band SFDR = 83 dBFS at 340 MHz (750 MSPS) * In band SNR = 66.7 dBFS at 340 MHz (750 MSPS) * 1.4 W total power per channel at 750 MSPS (default settings) * Noise density = −153 dBFS/Hz at 750 MSPS * 1.25 V, 2.5 V, and 3.3 V dc supply operation * Flexible input range * AD6674-750 and AD6674-1000 * 1.46 V p-p to 1.94 V p-p (1.70 V p-p nominal) * AD6674-500 * 1.46 V p-p to 2.06 V p-p (2.06 V p-p nominal) * 95 dB channel isolation/crosstalk https://elecena.pl/product/5235321/385-mhz-bw-if-diversity-receiver 2015-07-10 https://elecena.pl/product/5235321/385-mhz-bw-if-diversity-receiver 2016-09-01 https://elecena.pl/product/5235321/385-mhz-bw-if-diversity-receiver 2025-01-18