The AD9540 is Analog Devices’ first dedicated clocking product specifically designed to support the extremely stringent clocking requirements of the highest performance data converters. The device features high performance PLL (phase-locked loop) circuitry, including a flexible 200 MHz phase frequency detector and a digitally controlled charge pump current. The device also provides a low jitter, 655 MHz CML-mode, PECL-compliant output driver with programmable slew rates. External VCO rates up to 2.7 GHz are supported. Extremely fine tuning resolution (steps less than 2.33 µHz) is another feature supported by this device. Information is loaded into the AD9540 via a serial I/O port that has a device write speed of 25 Mbps. The AD9540 frequency divider block can also be programmed to support a spread spectrum mode of operation. The AD9540 is specified to operate over the extended automotive range of −40°C to +85°C. Applications * Clocking high performance data converters * Base station clocking applications * Network (SONET/SDH) clocking * Gigabit Ethernet (GbE) clocking * Instrumentation clocking circuits * Agile LO frequency synthesis * Automotive radar * FM chirp source for radar and scanning systems * Test and measurement equipment * Acousto-optic device drivers * Excellent intrinsic jitter performance * 200 MHz phase frequency detector inputs * 655 MHz programmable input dividers for the phase frequency detector (÷M, ÷N) {M, N = 1 to 16} (bypassable) * Programmable RF divider (÷R) {R = 1, 2, 4, 8} (bypassable) * 8 programmable phase/frequency profiles * 400 MSPS internal DDS clock speed * 48-bit frequency tuning word resolution https://elecena.pl/product/631522/low-jitter-dds-based-clock-generator-and-synthesizer 2008-04-12 https://elecena.pl/product/631522/low-jitter-dds-based-clock-generator-and-synthesizer 2015-02-14 https://elecena.pl/product/631522/low-jitter-dds-based-clock-generator-and-synthesizer 2025-01-21