The ADV7482 is an integrated video decoder and HDMI® receiver, targeted at connectivity enabled head units requiring a wired, uncompressed digital audio/video link from smartphones, and other consumer electronics devices to support streaming and integration of cloud-based multimedia content and applications into an automotive infotainment system. The ADV7482 HDMI capable receiver supports a maximum pixel clock frequency of 162 MHz, allowing HDTV formats up to 1080p, and display resolutions up to UXGA (1600 × 1200 at 60 Hz). The device integrates a consumer electronics control (CEC) controller that supports the capability discovery and control (CDC) feature. The HDMI input port has dedicated 5 V detect and Hot Plug™ assert pins. The HDMI receiver includes an adaptive transition minimized differential signaling (TMDS) equalizer that ensures robust operation of the interface with long cables. The ADV7482 contains a component processor (CP) that processes the video signals from the HDMI receiver. It provides features such as contrast, brightness, and saturation adjustments, as well as free run and timing adjustment controls for HS/VS/DE timing. The ADV7482 analog front end (AFE) comprises a single high speed, 10-bit analog-to-digital converter (ADC) that digitizes the analog video signal before applying it to the SDP. The eight analog video inputs can accept single-ended, pseudo differential, and fully differential composite video signals, as well as S-Video and YPbPr video signals, supporting a wide range of consumer and automotive video sources. Short to battery (STB) events can be detected on differential input video signals. STB protection is provided by ac coupling the input video signals. The ADV7482, in combination with an external resistor divider, provides a common-mode input range of 4 V, enabling the removal of large signal common-mode transients present on the video lines. The automatic gain control (AGC) and clamp restore circuitry allow an input video signal up to 1.0 V p-p at the analog video input pins of the ADV7482. Alternatively, the AGC and clamp restore circuitry can be bypassed for manual settings. The SDP of the ADV7482 is capable of decoding a large selection of analog baseband video signals in composite, S-Video, and component formats. The SDP supports worldwide NTSC, PAL, and SECAM standards. The ADV7482 features an 8-bit digital input/output port, supporting input and output video resolutions up to 720p/1080i in both the 8-bit interleaved 4:2:2 SDR and DDR modes. To enable glueless interfacing of these video input sources to the latest generation of infotainment system on chips (SoCs), the ADV7482 features two MIPI® CSI-2 transmitters. The four-lane transmitter provides four data lanes, two data lanes, and one data lane muxing options, and can be used to output video from the HDMI receiver, the SDP, and the digital input port. The single-lane transmitter can be used to output video from the SDP only. The ADV7482 offers a flexible audio output port for audio data extracted from HDMI streams. The HDMI receiver has advanced audio functionality, such as a mute controller that prevents audible extraneous noise in the audio output. Additionally, the ADV7482 can be set to output time division multiplexing (TDM) serial audio, which allows the transmission of eight multiplexed serial audio channels on a single audio output interface port. The ADV7482 is programmed via a 2-wire, serial, bidirectional port (I2C compatible). Fabricated in an advanced CMOS process, the ADV7482 is available in a 9 mm × 9 mm, RoHS-compliant, 100-ball CSPBGA package and is specified over the −40°C to +85°C temperature range. APPLICATIONS * Portable devices * Automotive infotainment (head unit and rear seat * entertainment systems) * HDMI repeaters and video switches * Analog input * Worldwide NTSC/PAL/SECAM color demodulation support with autodetection * 8 analog video input channels with on-chip antialiasing filter * Fully differential, pseudo differential, and single-ended CVBS video input support * High-Definition Multimedia Interface (HDMI) capable receiver * HDCP authentication and decryption support * 162 MHz maximum pixel clock frequency, allowing HDTV formats up to 1080p and display resolutions up to UXGA (1600 × 1200 at 60 Hz) * Component video processor * Any-to-any 3 × 3 color space conversion (CSC) matrix * Contrast, brightness, hue, saturation video adjustment * Timing adjustments controls for horizontal sync (HS)/vertical sync (VS)/data enable (DE) timing