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  <title>[elecena] Multi-rate video clock generator with Genlock - zmiany ceny</title>
  <description>The LMH1982 device is a multi-rate video clock generator ideal for use in a wide range of
		3-Gbps (3G), high-definition (HD), and standard-definition (SD) video applications, such as video
		synchronization, serial digital interface (SDI) serializer and deserializer (SerDes), video
		conversion, video editing, and other broadcast and professional video systems.

	 The LMH1982 can generate two simultaneous SD and HD clocks and a Top of Frame (TOF)
		pulse. In genlock mode, the device's phase locked loops (PLLs) can synchronize the output signals
		to H sync and V sync input signals applied to either of the reference ports. The input reference
		can have analog timing from Texas Instrument's LMH1981 multi-format video sync separator or digital
		timing from an SDI deserializer and should conform to the major SD and HD standards. When a loss of
		reference occurs, the device can default to free run operation where the output timing accuracy
		will be determined by the external bias on the free run control voltage input.

	 The LMH1982 can replace discrete PLLs and field-programmable gate array (FPGA) PLLs with
		multiple voltage controlled crystal oscillators (VCXOs). Only one 27.0000 MHz VCXO and loop filter
		are externally required for genlock mode. The external loop filter as well as programmable PLL
		parameters can provide narrow loop bandwidths to minimize jitter transfer. HD clock output jitter
		as low as 40 ps peak-to-peak can help designers using FPGA SerDes meet stringent SDI output jitter
		specifications.

	 The LMH1982 is offered in a space-saving 5 mm × 5 mm 32-pin WQFN package and provides low
		total power consumption of about 250 mW (typical).</description>
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