DSPIC33EP512GP504-I/PT MCU, dsPIC, 16-bit, 512 KB, TQFP-44

Microchip’s dsPIC33E general purpose DSC family features the highest speed 70 MIPS core with excellent performance and code density. It offers superior ADC performance, enhanced CAN communication, CTMU, Op Amps and Peripheral Trigger Generator (PTG) for high-end general purpose applications.

Operating conditions: - 3.0 V to 3.6 V, -40°C to +85°C, DC up to 70 MIPS - 3.0 V to 3.6 V, -40°C to +125°C, DC up to 60 MIPS

Core: 16-bit dsPIC33E/PIC24E CPU - Code-efficient (C and assembly) architecture - Two 40-bit wide accumulators - Single-cycle (MAC/MPY) with dual data fetch - Single-cycle, mixed-sign MUL plus hardware divide - 32-bit multiply support

Clock management - 1.0% internal oscillator - Programmable PLLs and oscillator clock sources - Fail-Safe Clock Monitor (FSCM) - Independent Watchdog Timer (WDT) - Fast wake-up and start-up

Power management - Low-power management modes (sleep, idle, doze) - Integrated power-on reset and brown-out reset - 0.6 mA/MHz dynamic current (typical) - 30 µA IPD current (typical)