Low Power, Chip Scale 10-Bit SD/HD Video Encoder

The ADV7390 / ADV7391 / ADV7392 / ADV7393 are a family of high speed, digital-to-analog video encoders on single monolithic chips. Three 2.7 V/3.3 V 10-bit video digital-to-analog converters (DACs) provide support for composite (CVBS), S-Video (Y-C), or component (YPrPb/RGB) analog outputs in either standard definition (SD) or high definition (HD) video formats.

Optimized for low power operation, occupying a minimal footprint and requiring few external components, these encoders are ideally suited to portable and power sensitive applications requiring TV-out functionality. Cable detection and DAC automatic power-down features ensure that power consumption is kept to a minimum.

The ADV7390 / ADV7391 have an 8-bit video input port that supports SD video formats over a software defined radio (SDR) interface and HD video formats over a double data rate (DDR) interface.

The ADV7392 / ADV7393 have a 16-bit video input port that can be configured in a variety of ways. SD RGB input is supported. All members of the family support embedded EAV/SAV timing codes, external video synchronization signals, and the I2C communication protocol.

APPLICATIONS

* Mobile handsets

* Digital still cameras

* Portable media and DVD players

* Portable game consoles

* Digital camcorders

* Set-top box (STB)

* Automotive infotainment (ADV7392 and ADV7393 only)

* 3 high quality, 10-bit video DACs

* 16× (216 MHz) DAC oversampling for SD

* 8× (216 MHz) DAC oversampling for ED

* 4× (297 MHz) DAC oversampling for HD

* 37 mA maximum DAC output current

* Multiformat video input support

* 4:2:2 YCrCb (SD, ED, and HD)

* 4:4:4 RGB (SD)

* Multiformat video output support

* Composite (CVBS) and S-Video (Y-C)

* Component YPrPb (SD, ED, and HD)

* Component RGB (SD, ED, and HD)

* Lead frame chip scale package (LFCSP) options

* 32-lead, 5 mm × 5 mm LFCSP

* 40-lead, 6 mm × 6 mm LFCSP

* Wafer level chip scale package (WLCSP) option

* 30-ball, 5 × 6 WLCSP with single DAC output

* Advanced power management

* Patented content-dependent low power DAC operation

* Automatic cable detection and DAC power-down

* Individual DAC on/off control

* Sleep mode with minimal power consumption

* 74.25 MHz 8-/10-/16-bit high definition input support

* Compliant with SMPTE 274M (1080i), 296M (720p),

and 240M (1035i)

* EIA/CEA-861B compliance support

* NTSC M, PAL B/D/G/H/I/M/N, PAL 60 support

* NTSC and PAL square pixel operation (24.54 MHz/29.5 MHz)

* Macrovision Rev 7.1.L1 (SD) and Rev 1.2 (ED) compliant

* Copy generation management system (CGMS)

* Closed captioning and wide screen signaling (WSS)

* Integrated subcarrier locking to external video source

* Complete on-chip video timing generator

* On-chip test pattern generation

* Programmable features

* Luma and chroma filter responses

* Vertical blanking interval (VBI)

* Subcarrier frequency (fSC) and phase

* Luma delay

* High definition (HD) programmable features

* (720p/1080i/1035i)

* 4× oversampling (297 MHz)

* Internal test pattern generator

* Color and black bar, hatch, flat field/frame

* Fully programmable YCrCb to RGB matrix