Clock Distribution Circuit

The 6P30006A is a low-power, eight output clock distribution circuit. The device takes a TCXO or LVCMOS input and generates eight high-quality outputs. It includes a redundant input with automatic glitch-free switching when the primary reference is removed. The primary input may be selected by the user by pulling the SEL pin low or high. If the primary input is removed and brought back, it will not be re-selected until 1024 cycles have passed. The 6P30006A specifically addresses the needs of handheld applications in both performance and package size. The device is packaged in a small 4mm x 4mm 24-pin QFN, allowing optimal use for limited board space.