8K x 36 x 2 SyncBiFIFO, 5.0V

The 723672 is a Bidirectional SyncFIFO (clocked) memory. Two independent 8,192 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.