Two-channel 1.1V-to-3.6V configurable gate for clock input with Schmitt-trigger inputs

The SN74LVC2G101 contains two independent D-type flip-flops. Each channel has data (D), clear (CLR), and clock (CLKA, CLKB, CLKC, CLKD) inputs and a non-inverted output (Q). The clock inputs can be configured for use in a wide variety of applications, allowing for configuration as 2-input AND, OR, NAND, NOR, XOR, XNOR, as well as 1-input inverted or non-inverted operation. All inputs include Schmitt-trigger architecture.