1.5V to 6.0V 8-bit serial-in and parallel-out shift register

The SN74AC596 device contains an 8-bit, serial-in, parallel-out shift

register that feeds an 8-bit D-type storage register. The storage register has

parallel open-drain outputs. Separate clocks are provided for both the shift and

storage register. The shift register has a direct overriding clear

(SRCLR) input, serial (SER) input, and a serial output

(QH’) for cascading. When the output-enable (OE)

input is high, the outputs are in a high-impedance state. Internal register data is

not impacted by the operation of the OE input.