2:1 Differential Clock / Data Multiplexer

The 831721I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing of high-frequency clock and data signals. The device has two differential, selectable clock/data inputs. The selected input signal is output at one differential HCSL output. Each input pair accepts HCSL, LVDS, and LVPECL levels. The 831721I is characterized to operate from a 3.3V power supply. Guaranteed input, output-to-output and part-to-part skew characteristics make the 831721I ideal for those clock and data distribution applications demanding well-defined performance and repeatability. The 831721I supports the clock multiplexing and distribution of PCI Express Generation 1, 2 and 3 clock signals.