IEEE 802.3cg 10BASE-T1L Ethernet PHY

The DP83TD510E is an ultra-low power

Ethernet physical layer transceiver compliant with the IEEE 802.3cg 10Base-T1L

specification. The PHY has very low noise coupled receiver architecture enabling

long cable reach and very low power dissipation. The DP83TD510E has external MDI

termination to support intrinsic safety requirements. It interfaces with MAC layer

through MII, Reduced MII (RMII) , RGMII, and RMII low power 5-MHz master mode. It

also supports RMII back-to-back mode for applications that require cable reach

extension beyond 2000 meters. It supports a 25MHz reference clock output to clock

other modules on the system. The DP83TD510E offers integrated cable diagnostic

tools; built-in self-test, and loopback capabilities for ease of design or debug.